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Sheet目录3886

101页 102页 103页 104页 [105页]106页 107页 108页 109页

NXP Semiconductors

SC16C850

2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder

NXP B.V. 2010.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 11 November 2010

Document identifier: SC16C850

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

17. Contents

General description . . . . . . . . . . . . . . . . . . . . . . 1

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

Ordering information . . . . . . . . . . . . . . . . . . . . . 2

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Pinning information . . . . . . . . . . . . . . . . . . . . . . 5

5.1

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

5.2

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6

Functional description . . . . . . . . . . . . . . . . . . . 9

6.1

UART selection. . . . . . . . . . . . . . . . . . . . . . . . . 9

6.2

Extended mode (128-byte FIFO) . . . . . . . . . . 10

6.3

Internal registers . . . . . . . . . . . . . . . . . . . . . . . 10

6.4

FIFO operation . . . . . . . . . . . . . . . . . . . . . . . . 11

6.4.1

32-byte FIFO mode . . . . . . . . . . . . . . . . . . . . 11

6.4.2

128-byte FIFO mode . . . . . . . . . . . . . . . . . . . 11

6.5

Hardware flow control . . . . . . . . . . . . . . . . . . . 12

6.6

Software flow control . . . . . . . . . . . . . . . . . . . 12

6.7

Special character detect . . . . . . . . . . . . . . . . . 13

6.8

Interrupt priority and time-out interrupts . . . . . 13

6.9

Programmable baud rate generator . . . . . . . . 14

6.10

Loopback mode . . . . . . . . . . . . . . . . . . . . . . . 16

6.11

Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 18

6.11.1

Conditions to enter Sleep mode . . . . . . . . . . . 18

6.11.2

Conditions to resume normal operation . . . . . 18

6.12

Low power feature . . . . . . . . . . . . . . . . . . . . . 18

6.13

RS-485 features . . . . . . . . . . . . . . . . . . . . . . . 19

6.13.1

Auto RS-485 RTS control . . . . . . . . . . . . . . . . 19

6.13.2

RS-485 RTS inversion . . . . . . . . . . . . . . . . . . 19

6.13.3

Auto 9-bit mode (RS-485). . . . . . . . . . . . . . . . 19

6.13.3.1

Normal Multi-drop mode . . . . . . . . . . . . . . . . . 19

6.13.3.2

Auto address detection . . . . . . . . . . . . . . . . . . 20

Register descriptions . . . . . . . . . . . . . . . . . . . 20

7.1

Transmit (THR) and Receive (RHR)

Holding Registers . . . . . . . . . . . . . . . . . . . . . . 23

7.2

Interrupt Enable Register (IER) . . . . . . . . . . . 23

7.2.1

IER versus Transmit/Receive FIFO

interrupt mode operation . . . . . . . . . . . . . . . . 24

7.2.2

IER versus Receive/Transmit FIFO

polled mode operation . . . . . . . . . . . . . . . . . . 24

7.3

FIFO Control Register (FCR) . . . . . . . . . . . . . 25

7.3.1

FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.4

Interrupt Status Register (ISR) . . . . . . . . . . . . 26

7.5

Line Control Register (LCR) . . . . . . . . . . . . . . 27

7.6

Modem Control Register (MCR) . . . . . . . . . . . 28

7.7

Line Status Register (LSR) . . . . . . . . . . . . . . . 29

7.8

Modem Status Register (MSR) . . . . . . . . . . . . 30

7.9

Extra Feature Control Register (EFCR) . . . . . 31

7.10

Scratchpad Register (SPR) . . . . . . . . . . . . . . 31

7.11

Divisor Latch (DLL and DLM). . . . . . . . . . . . . 31

7.12

Transmit FIFO Level Count (TXLVLCNT) . . . 31

7.13

Receive FIFO Level Count (RXLVLCNT). . . . 31

7.14

Enhanced Feature Register (EFR) . . . . . . . . 32

7.15

Transmit Interrupt Level Register (TXINTLVL) 33

7.16

Receive Interrupt Level Register (RXINTLVL) 33

7.17

Flow Control Trigger Level High (FLWCNTH) 34

7.18

Flow Control Trigger Level Low (FLWCNTL) . 34

7.19

Clock Prescaler (CLKPRES) . . . . . . . . . . . . . 34

7.20

RS-485 Turn-around time delay (RS485TIME) 35

7.21

Advanced Feature Control Register 2

(AFCR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7.22

Advanced Feature Control Register 1

(AFCR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7.23

SC16C850 external reset condition and

software reset . . . . . . . . . . . . . . . . . . . . . . . . 37

Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 38

Static characteristics . . . . . . . . . . . . . . . . . . . 38

Dynamic characteristics. . . . . . . . . . . . . . . . . 39

10.1

Timing diagrams. . . . . . . . . . . . . . . . . . . . . . . 41

Package outline. . . . . . . . . . . . . . . . . . . . . . . . 47

Soldering of SMD packages . . . . . . . . . . . . . . 49

12.1

Introduction to soldering. . . . . . . . . . . . . . . . . 49

12.2

Wave and reflow soldering. . . . . . . . . . . . . . . 49

12.3

Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 49

12.4

Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 50

Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 51

Revision history . . . . . . . . . . . . . . . . . . . . . . . 52

Legal information . . . . . . . . . . . . . . . . . . . . . . 53

15.1

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 53

15.2

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

15.3

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 53

15.4

Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Contact information . . . . . . . . . . . . . . . . . . . . 54

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

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